Cypress Semiconductor /psoc63 /FAULT /STRUCT[1] /CTL

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Interpret as CTL

Description

Fault control

Fields

TR_EN	Trigger output enable: ‘0’: Disabled. The trigger output ‘tr_fault’ is ‘0’. ‘1’: Enabled. The trigger output ‘tr_fault’ reflects STATUS.VALID. The trigger can be used to initiate a Datawire transfer of the FAULT data (FAULT_DATA0 through FAULT_DATA3).
OUT_EN	IO output signal enable: ‘0’: Disabled. The IO output signal ‘fault_out’ is ‘0’. The IO output enable signal ‘fault_out_en’ is ‘0’. ‘1’: Enabled. The IO output signal ‘fault_out’ reflects STATUS.VALID. The IO output enable signal ‘fault_out_en’ is ‘1’.
RESET_REQ_EN	Reset request enable: ‘0’: Disabled. ‘1’: Enabled. The output reset request signal ‘fault_reset_req’ reflects STATUS.VALID. This reset causes a warm/soft/core reset. This warm/soft/core reset does not affect the fault logic STATUS, DATA0, …, DATA3 registers (allowing for post soft reset failure analysis). The ‘fault_reset_req’ signals of the individual fault report structures are combined (logically OR’d) into a single SRSS ‘fault_reset_req’ signal.

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